Advanced VLSI Design (高等積體電路設計)

Instructor: 吳安宇 教授,

E-mail: andywu@cc.ee.ntu.edu.tw,          Phone: 2363-5251, ext. 409

Prerequisite: VLSI Design (Required), C programming Skills (Preferred)

TA: 許槐益,  E-mail: yuki@access.ee.ntu.edu.tw

Homepage: http://access.ee.ntu.edu.tw/course/advanced_VLSI_91


Objective: 

        This course is designed for undergraduate students who have taken “Introduction to VLSI”, and graduate students who want to practice VLSI design flow and tools.

           In the content part, we will cover the design techniques for advanced DSP systems, such as computer arithmetic, basic DSP modules such power-of-two FIR designs, and Wave Pipelining VLSI designs. 

           To follow the trend of “System-on-Chip (SOC)” design, we will add some new topics such as Reuse Manual Methodology (RMM), and System-on-a-Programmable-Chip (SPOC). Extensive homeworks and Labs will be given in this course.


Content Outline:

  1. Review of computer arithmetic

  1. Redundant Arithmetic

  2. Numerical Strength Reduction

  3. Low-power CMOS Design

  4. Wave-pipelining VLSI Design

  5. Asynchronous VLSI Design

  6. Overview of IP and SOC Design

  7. Final project presentation


Lab Outline:

System-on-a-Programmable-Chip (SOPC) Systems

A.         FPGA Design Flow base on Quartus II and Verify Equipment

B.         NIOS Embedded System

C.        SOPC Design using NIOS Embedded systems.


Textbook:

1.        (Main) “VLSI Digital Signal Processing Systems: Design and Implementation," by K. K. Parhi, Wiley-Interscience Publication, 1999.

2.        (Referenced) “Application-Specific Integrated Circuits,” by Michael J. S. Smith, Addison-Wesley Publishing, 1997 (新月) – A good reference book for ASIC Design Flow and Concept.

3.        (Required background) “Principles of CMOS VLSI design - A systems perspective,” by Neil Weste and Kamran Eshraghian, 2nd edition, Addison-Wesley Publishing, 1993.

4.        Course notes and papers.


Tool textbooks:

1.        (Main) “Verilog硬體描述語言數位電路設計實務”, 作者: 鄭信源, 儒林圖書有限公, 網址: www.scholars.com.tw, 2000.

2.        (Referenced) Verilog 硬體描述語言(Verilog HDL), 原著: Samir Palnitkar, 原出版社: Prentice Hall, 編譯: 黃英叡, 黃稚存, 張銓淵, 江文啟, 全華科技圖書, 88.

3.        (Referenced) "Modeling, Synthesis, and Rapid Prototyping with the Verilog HDL," by Michael D. Ciletti, University of Colorado, Prentice Hall, 1999, (ISBN0-13-977398-3).

4.        (Referenced) "HDL Chip Design" a practical guide for designing, synthesizing and simulating ASICs and FPGAs using VHDL or Verilog,” by Douglas J. Smith, Doone Publications, 2000, (ISBN0-9651934-3-8).


Teaching Format:

1.      Three hours of lecture when focusing on VLSI design techniques

2.      When Labs or homeworks are assigned: Two hours of lecture focusing on design techniques, and one of lecture focusing on IC tools and assigned homeworks and labs per week.

3.      Assign homeworks and labs on a regular basis.

4.      Open lab hours on one night (6-10, Time to be discussed) in the IC Design Lab (E2-231).


Grading method:

1.        Participation 2% (about four times). This part can be recovered if your final grade is above 88.

2.        One mid-term exam covering most design techniques (35%)

3.        One mid-term report for final project proposal (18%)

4.        One Final Project using SOPC systems (15%)

5.        Homeworks and Labs (30%)


What can you learn from this course?

1.        Advanced algorithms and architectures for computer arithmetic and some typical DSP modules.

2.        Front-end IC Design flow for functional verification (based on VHDL/Verilog and Synthesis tools)

3.         IP authoring techniques for SOC era.

4.       SOPC design flow (evolved from FPGA design flow)

5.        Similar to VLSI Design Laboratory Course but with more emphasis on emerging SOC design concept (e.g., RMM) and design kit (e.g., SOPC)

6.        Suitable for

A.     Undergraduate students who want to learn complete digital IC design flow after taking “Introduction of VLSI” (Hence, you don’t have to take undergraduate projects to learn the IC design flow).

B.     Non-ICS Graduate students who want to learn more design skills for future jobs.


Advanced VLSI  course schedule :

Date

Course

9/18

Booth-encoded Multiplier

9/25

2's Complement Multiplication

10/2

CORDIC

10/9

CORDIC / Distribution Arithmetic

10/16

Distribution Arithmetic 

10/23

Residue Number System

10/30

Digit-Serial architecture

11/6

Division

11/13

Fixed-point Analysis

11/20

Redundant Arithmetic

11/27

Redundant Arithmetic / Numerical Strength Reduction

12/4

Numerical Strength Reduction

12/11

Low-Power CMOS design

12/18

Mid-term exam

12/25

SOPC Tool and Environment & Lab I

1/1

Holiday

1/8

SOPC Tool and Environment & Lab II

1/15

Final Project Presentation

1/22

Final Project Report


Mid-term and Final project schedule (2002/12~2003/1):

1. Project Proposal (2-3 pages, due to 12/11/2002)
- Title, Team member list with E-mail (cover page)
- Topic and scope
- Research motivation and goal
- Problem statement
- Summary of your approach and execution plan
- Expected results and presentation format
- (Optional) Impact to your future research works.

Put printed proposal in Prof. Wu's mailbox by 12. 11. 2002. and e-mail to TA.

If two topics are overlapped, the better one will be chosen.


2. Presentation: 12/25/2002~1/8/2003
- Present your project in class
- Revise your slide based on the suggestions in class

- Submit your final Powerpoint file (ppt) to our TA, Huai-Yu Hsu at
yuki@access.ee.ntu.edu.tw, by 1/15/2003. It is considered as the
formal registration of your final topic.

3. Final report due: Jan. 22, 2003.
- 10-20+ pages of final report containing

- Cover Sheet: Team no., Project leader, and all members with E-mail list (better with Project leader's phone no.).
- Introduction (Research motivation and problem statement)
- Technical overview and derivation (approach)
- Simulation results (if any)
- Comparison with existing approaches by using figures and tables
- Discussion of your topic
- Conclusions (impact to your research works and future applications)
- Reference list (follow IEEE format)

Submit your final report (two files: word and PDF) to our TA by E-amil
(Huai-Yi Hsu at yuki@access.ee.ntu.edu.tw) by Jan. 15, 2002. Also, put one
hardcopy to Prof. Wu's mailbox. Both electronic submission and hardcopy
is necessary to get your final grade.


Side note: SOPC workshop
- 12/25: SOPC Part-I, System of Programmable Chip Overview and Lab. 1.

-   1/8  : SOPC Part-II, SOPC tools and Lab Environment and Lab. 2.