Date Announcements
15/09/14 Syllabus of FFT Project




Date Lecture Speaker Supplementary HW
15/09/22 Introduction to Undergraduate Project Wes
15/09/29 Introduction to Digital System Design & IC Design Flow Dan
15/10/06 Verilog HDL, HDL Simulation, Waveform debugger Shan Workstation Intorduction
15/10/13 Behavior Modeling Boris HW1:Multiplier
15/10/20 Datapath & Controller James HW2:FIFO
15/10/27 FFT Algorithm & Architecture
Techniques in VLSI Design
Tim Reference HW3:Up Down Counter
15/11/03 FFT Paper, No Class Mentors
15/11/10 Midterm Week (Break)      
15/11/17 FFT Paper, No Class Mentors    
15/11/24 Midterm Presentation    
15/12/01 Synthsis of Combinational Logic Weihan HW4:Folding
15/12/08 Synthesis Jason    
15/12/15 Coding Style, Improve Power & Area & Timing Michael    
15/12/22 Mentor(FFT Project)      
15/12/29 Mentor(FFT Project)      
16/01/05 Mentor(FFT Project)      
16/01/12 Final Exam Week(Break)      
16/01/19 Final Presentation      



[1] Alan V.Oppenheim, Ronald W. Schafer, ”Discrete-time signal processing” 2nd edition.

[2] Shousheng He and Torkelson, M.,”A new approach to pipeline FFT processor,” Proceedings of IPPS '96, 15-19 April 1996, pp766 –770.

Team members





實驗室位址: 台灣大學電機二館232室

Name Nick name E-mail address
李懷霆 Wes wesli @